ABB REF615E-D-HBFDACADANB1BNN1XD modular

ABB REF615E-D-HBFDACADANB1BNN1XD modular

Data buffering: Because the RATE of the I/O device is low and the rate of the CPU and memory is high, a buffer must be installed in the controller. In the output, the buffer is used to temporarily store the data transmitted by the host at high speed, and then the data in the buffer is transmitted to the I/O device at the rate that the I/O device has. During input, the buffer is used to temporarily store the data sent from the I/O device. After receiving a batch of data, the data in the buffer is transmitted to the host at a high speed.

Error control: The device controller is also responsible for error detection of data transmitted by the I/O device. If an error is found in the transmission, the error detection code is usually set and reported to the CPU, which invalidates the data sent this time and transmits it again. This ensures the correctness of the data input.

Data exchange: This refers to the exchange of data between CPU and controller, and between controller and device. For the former, data is written to or read from the controller in parallel by the CPU through the data bus. In the latter case, it is the device that inputs data to and from the controller to the device. To do this, a data register must be set up in the controller.

Status description: Identifies and reports the status of the device. The controller should record the status of the device for the CPU to understand. For example, the CPU can start the controller to read data from the device only when the device is in a send-ready state. To this end, a state register should be set up in the controller, with each bit to reflect a certain state of the equipment. When the CPU reads the contents of the register, it can learn about the state of the device.

Receive and recognize commands: The CPU can send many different commands to the controller, and the device controller should be able to receive and recognize these commands. Therefore, the controller should have corresponding control registers, which are used to store the received commands and parameters, and decode the received commands. For example, the disk controller can receive 15 different commands such as Read, Write, and Format from the CPU, some of which have parameters. Accordingly, there are multiple registers, command decoders and so on in the disk controller.

Address recognition: Just as every cell in memory has an address, every device in the system has an address, and the device controller must be able to recognize the address of every device it controls. In addition, in order for the CPU to write (or read) data to (or from) registers, these registers should have unique addresses.

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